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ARM: sh7372: fix cache clean / invalidate order
According to the Cortex A8 TRM the L2 cache should be first cleaned and then disabled. Fix the swapped order on sh7372. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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