drm/amd/display: Disable SubVP for PSR panels

Browse source

[Description]
- We cannot enable subvp on PSR panels because when
  PSR is active, HUBP is turned off and we cannot rely
  on the HUBP vline interrupt
- When in PSR, surface data also cannot be prefetched to MALL
  because the main HUBP will be off

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Alvin Lee 2023-01-10 11:27:59 -05:00 • committed by Alex Deucher

parent e019a7ba38

commit 9973364832

3 changed files with 12 additions and 1 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

1

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.h

View file

10

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c

View file

2

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

View file