riscv: dts: microchip: move the mpfs' pci node to -fabric.dtsi

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In today's edition of moving things around:

The PCIe root port on PolarFire SoC is more part of the FPGA than of
the Core Complex. It is located on the other side of the chip and,
apart from its interrupts, most of its configuration is determined
by the FPGA bitstream rather. This includes:

- address translation in both directions
- the addresses at which the config and data regions appear to the
  core complex
- the clocks used by the AXI bus
- the plic interrupt used

Moving the PCIe node to the -fabric.dtsi makes it clearer than a
singular configuration for root port is not correct & allows the
base SoC dtsi to be more easily included.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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This commit is contained in:

Conor Dooley 2022-09-27 12:19:17 +01:00

parent f890e67f29

commit 99d451a7db

3 changed files with 58 additions and 33 deletions

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32

arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi

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29

arch/riscv/boot/dts/microchip/mpfs-polarberry-fabric.dtsi

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arch/riscv/boot/dts/microchip/mpfs.dtsi

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