x86/CPU/AMD: Properly check the TSA microcode

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In order to simplify backports, I resorted to an older version of the
microcode revision checking which didn't pull in the whole struct
x86_cpu_id matching machinery.

My simpler method, however, forgot to add the extended CPU model to the
patch revision, which lead to mismatches when determining whether TSA
mitigation support is present.

So add that forgotten extended model.

Also, fix a backport mismerge which put tsa_init() where it doesn't
belong.

This is a stable-only fix and the preference is to do it this way
because it is a lot simpler. Also, the Fixes: tag below points to the
respective stable patch.

Fixes: 90293047df ("x86/bugs: Add a Transient Scheduler Attacks mitigation")
Reported-by: Thomas Voegtle <tv@lio96.de>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Message-ID: <04ea0a8e-edb0-c59e-ce21-5f3d5d167af3@lio96.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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Borislav Petkov (AMD) 2025-07-11 21:30:39 +02:00 • committed by Greg Kroah-Hartman

parent dfc486ec9c

commit 9a0b9bb2f2

1 changed files with 3 additions and 2 deletions

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arch/x86/kernel/cpu/amd.c

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