ibmvnic: Ensure that device queue memory is cache-line aligned

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PCI bus slowdowns were observed on IBM VNIC devices as a result
of partial cache line writes and non-cache aligned full cache line writes.
Ensure that packet data buffers are cache-line aligned to avoid these
slowdowns.

Signed-off-by: Dwip N. Banerjee <dnbanerg@us.ibm.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

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Dwip N. Banerjee 2020-11-18 19:12:22 -06:00 • committed by Jakub Kicinski

parent 8ed589f383

commit 9a87c3fca2

2 changed files with 11 additions and 8 deletions

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9

drivers/net/ethernet/ibm/ibmvnic.c

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10

drivers/net/ethernet/ibm/ibmvnic.h

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