drm/amd/powerplay: SCLK will have a big drop with low VDDC when PPlib was enabled.

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SMC uses CurrSclkPllRange structure to keep track of what range of
PLL SCLK is sitting on.  Driver overwrites this value to 0 because
it's part of DPM table and driver doesn't program this.
This change will set this field to 0xFF every time there's a
init SMC table call.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Rex Zhu 2016-05-03 15:47:15 +08:00 • committed by Alex Deucher

parent f4833c4fd4

commit 9ab9cf058a

1 changed files with 2 additions and 1 deletions

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drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c

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