drm/amd/display: Fix DCN32 DPSTREAMCLK_CNTL programming

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[Why]
Each index in the DPSTREAMCLK_CNTL register
phyiscally maps 1-to-1 with HPO stream encoder
instance. On the other hand, each index in
DTBCLK_P_CNTL physically maps 1-to-1 with OTG
instance.

Current DCN32 DPSTREAMCLK_CLK programing assumes
that OTG instance always maps 1-to-1 with
HPO stream encoder instance. This is not always
guaranteed and can result in blackscreen.

[How]
Program the correct dpstreamclk instance with
the correct dtbclk_p source.

Reviewed-by: Ariel Bernstein <Eric.Bernstein@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

George Shen 2022-08-10 22:06:17 -04:00 • committed by Alex Deucher

parent a3c9b4c7a7

commit 9af611f290

2 changed files with 6 additions and 6 deletions

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8

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c

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4

drivers/gpu/drm/amd/display/dc/link/link_hwss_hpo_dp.c

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