drm/i915/pvc: Adjust EU per SS according to HAS_ONE_EU_PER_FUSE_BIT()

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If we're treating each bit in the EU fuse register as a single EU
instead of a pair of EUs, then that also cuts the number of potential
EUs per subslice in half.

Fixes: 5ac342ef84 ("drm/i915/pvc: Add SSEU changes")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220610230801.459577-1-matthew.d.roper@intel.com

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Matt Roper 2022-06-10 16:08:01 -07:00

parent e0d7371b46

commit 9affc1b87e

1 changed files with 1 additions and 1 deletions

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drivers/gpu/drm/i915/gt/intel_sseu.c

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