ASoC: tlv320aic32x4: Model BDIV divider in CCF

Model and manage BDIV divider as components in the Core
Clock Framework.  This should allow us to do some more complex
clock management and power control.  Also, some of the
on-board chip clocks can be exposed to the outside, and this
change will make those clocks easier to consume by other
parts of the kernel.

Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Annaliese McDermond 2019-03-21 17:58:48 -07:00 • committed by Mark Brown
commit 9b484124eb
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2 changed files with 62 additions and 30 deletions