media: atomisp: fix clock rate frequency setting

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changeset d5426f4c2e ("media: staging: atomisp: use clock framework for camera clocks")
removed a platform-specific code to set the clock rate, in favor of
using the Kernel clock framework.

However, instead of passing the frequency for clk_set_rate(),
it is passing either 0 or 1.

Looking at the original patchset, it seems that there are two
possible configurations for the ISP:

	0 - it will use a 25 MHz XTAL to provide the clock;
	1 - it will use a PLL with is set to 19.2 MHz
	    (only for the CHT version?)

Eventually, different XTALs and/or PLL frequencies might
be possible some day, so, re-implent the logic for it to be
more generic.

Fixes: d5426f4c2e ("media: staging: atomisp: use clock framework for camera clocks")
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>

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This commit is contained in:

Mauro Carvalho Chehab 2020-05-08 08:55:19 +02:00

parent f770e91a7b

commit 9b7632e8fe

1 changed files with 11 additions and 3 deletions

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14

drivers/staging/media/atomisp/platform/intel-mid/atomisp_gmin_platform.c

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