clk: renesas: r9a08g046: Add RSCI clocks and resets

Add clock and reset entries for the Serial Communications Interfaces
(RSCI) found on the RZ/G3L SoC.  This includes various dividers and mux
clocks needed for the four RSCI channels.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260505071544.8965-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das 2026-05-05 08:15:37 +01:00 • committed by Geert Uytterhoeven
commit 9bec6a9dc2