spi-nor: intel-spi: Fix number of protected range registers for BYT/LPT

The number of protected range registers is not the same on BYT/LPT/
BXT. GPR0 only exists on Apollo Lake and its offset is reserved on
other platforms.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
This commit is contained in:
Bin Meng 2017-09-11 02:41:51 -07:00 • committed by Cyrille Pitchen
commit 9cbb035cc1