drm/amdgpu: Fix SDMA UTC_L1 handling during start/stop sequences

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commit 7f3b16f3f2 upstream.

This commit makes two key fixes to SDMA v4.4.2 handling:

1. disable UTC_L1 in sdma_cntl register when stopping SDMA engines
   by reading the current value before modifying UTC_L1_ENABLE bit.

2. Ensure UTC_L1_ENABLE is consistently managed by:
   - Adding the missing register write when enabling UTC_L1 during start
   - Keeping UTC_L1 enabled by default as per hardware requirements

v2: Correct SDMA_CNTL setting (Philip)

Suggested-by: Jonathan Kim <jonathan.kim@amd.com>
Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 375bf56465)
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

...

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Jesse Zhang 2025-06-16 19:21:41 +08:00 • committed by Greg Kroah-Hartman

parent cc0a3fd781

commit 9cfa2fea25

1 changed files with 5 additions and 1 deletions

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drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

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