RISC-V: KVM: Implement stage2 page table programming

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This patch implements all required functions for programming
the stage2 page table for each Guest/VM.

At high-level, the flow of stage2 related functions is similar
from KVM ARM/ARM64 implementation but the stage2 page table
format is quite different for KVM RISC-V.

[jiangyifei: stage2 dirty log support]
Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>

...

This commit is contained in:

Anup Patel 2021-09-27 17:10:09 +05:30 • committed by Anup Patel

parent fd7bb4a251

commit 9d05c1fee8

5 changed files with 676 additions and 16 deletions

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12

arch/riscv/include/asm/kvm_host.h

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1

arch/riscv/kvm/Kconfig

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19

arch/riscv/kvm/main.c

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654

arch/riscv/kvm/mmu.c

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6

arch/riscv/kvm/vm.c

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