KVM: arm64: vgic-v3: Align emulated cpuif LPI state machine with the pseudocode

Browse source

Having realised that a virtual LPI does transition through an active
state that does not exist on bare metal, align the CPU interface
emulation with the behaviour specified in the architecture pseudocode.

The LPIs now transition to active on IAR read, and to inactive on
EOI write. Special care is taken not to increment the EOIcount for
an LPI that isn't present in the LRs.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20211010150910.2911495-6-maz@kernel.org

...

This commit is contained in:

Marc Zyngier 2021-10-10 16:09:10 +01:00

parent f87ab68272

commit 9d449c71bd

1 changed files with 8 additions and 12 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

20

arch/arm64/kvm/hyp/vgic-v3-sr.c

View file