phy: qcom-qmp-pcie: Fix high latency with 4x2 PHY when ASPM is enabled

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The PCIe QMP 4x2 RC PHY generates high latency when ASPM is enabled. This
seem to be fixed by clearing the QPHY_V5_20_PCS_PCIE_PRESET_P10_POST
register of the pcs_misc register space.

Fixes: 2c91bf6bf2 ("phy: qcom-qmp: Add SM8450 PCIe1 PHY support")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20221102081835.41892-1-manivannan.sadhasivam@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

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Manivannan Sadhasivam 2022-11-02 13:48:34 +05:30 • committed by Vinod Koul

parent 2584068a9e

commit 9ddcd920f8

2 changed files with 2 additions and 0 deletions

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drivers/phy/qualcomm/phy-qcom-qmp-pcie.c

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drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5_20.h

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