diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi index 6073e426774a..cc1a64e63ed5 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi @@ -280,6 +280,104 @@ clock-names = "sfp"; }; + serdes1: phy@1ea0000 { + compatible = "fsl,ls2088a-serdes1"; + reg = <0x00 0x1ea0000 0x0 0x2000>; + #address-cells = <1>; + #size-cells = <0>; + #phy-cells = <1>; + status = "disabled"; + + serdes1_lane_a: phy@0 { + reg = <0>; + #phy-cells = <0>; + }; + + serdes1_lane_b: phy@1 { + reg = <1>; + #phy-cells = <0>; + }; + + serdes1_lane_c: phy@2 { + reg = <2>; + #phy-cells = <0>; + }; + + serdes1_lane_d: phy@3 { + reg = <3>; + #phy-cells = <0>; + }; + + serdes1_lane_e: phy@4 { + reg = <4>; + #phy-cells = <0>; + }; + + serdes1_lane_f: phy@5 { + reg = <5>; + #phy-cells = <0>; + }; + + serdes1_lane_g: phy@6 { + reg = <6>; + #phy-cells = <0>; + }; + + serdes1_lane_h: phy@7 { + reg = <7>; + #phy-cells = <0>; + }; + }; + + serdes2: phy@1eb0000 { + compatible = "fsl,ls2088a-serdes2"; + reg = <0x00 0x1eb0000 0x0 0x2000>; + #address-cells = <1>; + #size-cells = <0>; + #phy-cells = <1>; + status = "disabled"; + + serdes2_lane_a: phy@0 { + reg = <0>; + #phy-cells = <0>; + }; + + serdes2_lane_b: phy@1 { + reg = <1>; + #phy-cells = <0>; + }; + + serdes2_lane_c: phy@2 { + reg = <2>; + #phy-cells = <0>; + }; + + serdes2_lane_d: phy@3 { + reg = <3>; + #phy-cells = <0>; + }; + + serdes2_lane_e: phy@4 { + reg = <4>; + #phy-cells = <0>; + }; + + serdes2_lane_f: phy@5 { + reg = <5>; + #phy-cells = <0>; + }; + + serdes2_lane_g: phy@6 { + reg = <6>; + #phy-cells = <0>; + }; + + serdes2_lane_h: phy@7 { + reg = <7>; + #phy-cells = <0>; + }; + }; + isc: syscon@1f70000 { compatible = "fsl,ls2080a-isc", "syscon"; reg = <0x0 0x1f70000 0x0 0x10000>;