From 9f115f9c3133294dfe149fe2e8376a854b0124a5 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 1 Jun 2026 13:38:51 +0200 Subject: [PATCH] arm64: dts: renesas: r8a78000: Enable application CPU cores via PSCI Add PSCI "enable-method" DT properties to all application CPU cores. This allows the OS to bring application CPU cores up and down. Signed-off-by: Marek Vasut Reviewed-by: Geert Uytterhoeven Link: https://patch.msgid.link/20260601113919.8327-1-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a78000.dtsi | 32 +++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a78000.dtsi b/arch/arm64/boot/dts/renesas/r8a78000.dtsi index 7780fb4e8351..fb71974ef390 100644 --- a/arch/arm64/boot/dts/renesas/r8a78000.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a78000.dtsi @@ -143,6 +143,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x0>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_0>; }; @@ -150,6 +151,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x100>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_1>; }; @@ -157,6 +159,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x200>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_2>; }; @@ -164,6 +167,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x300>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_3>; }; @@ -171,6 +175,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x10000>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_4>; }; @@ -178,6 +183,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x10100>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_5>; }; @@ -185,6 +191,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x10200>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_6>; }; @@ -192,6 +199,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x10300>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_7>; }; @@ -199,6 +207,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x20000>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_8>; }; @@ -206,6 +215,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x20100>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_9>; }; @@ -213,6 +223,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x20200>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_10>; }; @@ -220,6 +231,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x20300>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_11>; }; @@ -227,6 +239,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x30000>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_12>; }; @@ -234,6 +247,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x30100>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_13>; }; @@ -241,6 +255,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x30200>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_14>; }; @@ -248,6 +263,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x30300>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_15>; }; @@ -255,6 +271,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x40000>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_16>; }; @@ -262,6 +279,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x40100>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_17>; }; @@ -269,6 +287,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x40200>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_18>; }; @@ -276,6 +295,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x40300>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_19>; }; @@ -283,6 +303,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x50000>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_20>; }; @@ -290,6 +311,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x50100>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_21>; }; @@ -297,6 +319,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x50200>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_22>; }; @@ -304,6 +327,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x50300>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_23>; }; @@ -311,6 +335,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x60000>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_24>; }; @@ -318,6 +343,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x60100>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_25>; }; @@ -325,6 +351,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x60200>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_26>; }; @@ -332,6 +359,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x60300>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_27>; }; @@ -339,6 +367,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x70000>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_28>; }; @@ -346,6 +375,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x70100>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_29>; }; @@ -353,6 +383,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x70200>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_30>; }; @@ -360,6 +391,7 @@ compatible = "arm,cortex-a720ae"; reg = <0x0 0x70300>; device_type = "cpu"; + enable-method = "psci"; next-level-cache = <&L2_CA720_31>; };