powerpc/8xx: Always pin kernel instruction TLB

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Various kernel asm modifies SRR0/SRR1 just before executing
a rfi. If such code crosses a page boundary you risk a TLB miss
which will clobber SRR0/SRR1. Avoid this by always pinning
kernel instruction TLB space.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

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Joakim Tjernlund 2009-12-29 05:10:58 +00:00 • committed by Benjamin Herrenschmidt

parent 004b350632

commit 9f4f04ba2b

1 changed files with 4 additions and 4 deletions

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arch/powerpc/kernel/head_8xx.S

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