ath9k: Fix RTC_DERIVED_CLK usage

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commit 4e6ce4dc7c upstream.

Based on the reference clock, which could be 25MHz or 40MHz,
AR_RTC_DERIVED_CLK is programmed differently for AR9340 and AR9550.
But, when a chip reset is done, processing the initvals
sets the register back to the default value.

Fix this by moving the code in ath9k_hw_init_pll() to
ar9003_hw_override_ini(). Also, do this override for AR9531.

Signed-off-by: Miaoqing Pan <miaoqing@qca.qualcomm.com>
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Signed-off-by: Luis Henriques <luis.henriques@canonical.com>

...

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Miaoqing Pan 2014-11-06 10:52:23 +05:30 • committed by Luis Henriques

parent c9e9de3e67

commit 9faf0723dc

2 changed files with 13 additions and 13 deletions

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13

drivers/net/wireless/ath/ath9k/ar9003_phy.c

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13

drivers/net/wireless/ath/ath9k/hw.c

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