arm64: dts: imx8mm: Slow default video_pll1 clock rate

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Since commit 8208181fe5 ("clk: imx: composite-8m:
Add imx8m_divider_determine_rate") the lcdif controller has
had the ability to set the lcdif_pixel rate which propagates
up the tree and sets the video_pll1 rate automatically.

By setting this value low, it will force the recalculation of
video_pll1 to the lowest rate needed by lcdif instead of
dividing a larger clock down to the desired clock speed. This
has the  advantage of being able to lower the video_pll1 rate
from 594MHz to 148.5MHz when operating at 1080p. It can go even
lower when operating at lower resolutions and refresh rates.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> # Kontron BL i.MX8MM
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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Adam Ford 2023-11-27 22:54:15 -06:00 • committed by Shawn Guo

parent 5b28b39dda

commit a0deedcc0c

1 changed files with 1 additions and 1 deletions

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arch/arm64/boot/dts/freescale/imx8mm.dtsi

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