arm64: tegra: Enable DFLL clock on Jetson TX1

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Enable DFLL clock for Jetson TX1 platform.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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Joseph Lo 2019-01-04 11:06:59 +08:00 • committed by Thierry Reding

parent a5e98b0b37

commit a1304d352c

1 changed files with 21 additions and 0 deletions

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arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts

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