drm/i915/dram: Also apply the 16Gb DIMM w/a for larger DRAM chips

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While the spec only asks us to do the WM0 latency bump for 16Gb
DRAM devices I believe we should apply it for larger DRAM chips.
At the time the w/a was added there were no larger chips on
the market, but I think I've seen at least 32Gb DDR4 chips
being available these days.

Whether it's possible to actually find suitable DIMMs for the
affected systems with largers chips I don't know. Also it's
not known whether the 1 usec latency bump would be sufficient
for larger chips. Someone would need to find such DIMMs and
test this. Fortunately we do have a bit of extra latency already
with the 1 usec bump, as the actual requirement was .4 usec for
for 16Gb chips.

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250919193000.17665-2-ville.syrjala@linux.intel.com

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This commit is contained in:

Ville Syrjälä 2025-09-19 22:29:48 +03:00

parent 97fd25f8b6

commit a1d0a0549d

2 changed files with 7 additions and 7 deletions

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4

drivers/gpu/drm/i915/display/skl_watermark.c

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10

drivers/gpu/drm/i915/soc/intel_dram.c

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