clk: renesas: r9a08g046: Add clock and reset entries for SDHI

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Add clock and reset entries for SDHI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260603065731.93243-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Biju Das 2026-06-03 07:57:02 +01:00 • committed by Geert Uytterhoeven

parent 7774d5b240

commit a1fa2f528c

1 changed files with 92 additions and 0 deletions

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drivers/clk/renesas/r9a08g046-cpg.c

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