drm/amd/display: update dcn351 used clock offset

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[why]
hw register offset delta

Reviewed-by: Martin Leung <martin.leung@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Charlene Liu 2024-11-29 17:18:50 -05:00 • committed by Alex Deucher

parent 25ac54d6b7

commit a1fc2837f4

6 changed files with 308 additions and 34 deletions

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2

drivers/gpu/drm/amd/display/dc/clk_mgr/Makefile

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5

drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c

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140

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn351_clk_mgr.c

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130

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

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4

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.h

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59

drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h

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