drm/msm/disp/dpu1: fix display underruns during modeset.

Browse source

During crtc disable, display perf structures are reset to 0
which includes state varibles which are immutable. On crtc
enable, we use the same structures and they don't refelect
the actual values

1) Fix is to avoid updating the state structures during disable.
2) Reset the perf structures during atomic check when there is no
modeset enable.

Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org>
Reported-by: Stephen Boyd <swboyd@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/1616158446-19290-1-git-send-email-kalyan_t@codeaurora.org
Signed-off-by: Rob Clark <robdclark@chromium.org>

...

This commit is contained in:

Kalyan Thota 2021-03-19 05:54:06 -07:00 • committed by Rob Clark

parent 33b2b91e34

commit a29c8c0241

2 changed files with 1 additions and 1 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

1

drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

View file

1

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

View file