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Changes for ti-sysc interconnect target module driver for v5.5
A series of changes from Tero Kristo for rpm reset control driver to deal with the ordering requirements between clocks and resets, and two changes to deal with quirks for musb otg device. -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl2wk4URHHRvbnlAYXRv bWlkZS5jb20ACgkQG9Q+yVyrpXNsgA//eGNfveY1+W1+4bzDIbNyrfeFe7KJ/znb dHlF/RMBpsVOAjrZkjmn+lo9D+j+r9XiVt9GZDwUkQoG/vFOdraALK9+5KnF7aF6 ej9UgWLCg+A6y14+4QsyWvikKmhgrbuHqga08q82YOV+C9F765B+ihJeBLNFUzXC S/a19M03af+4qekRWLLPYale3Prpu+ifVG6hBH2+HP6g90VcwQFZh46H9vBzHBEo agahVUEWU1RMEZfFGl8U879e3XJhS80jpzn2I9SKFNuDQt4BS1oApiUCLxTbD1z4 licc2VezxlTlF1Z1bQiwJD7eIUvLA6o0YeZr2x7WsBN98S6kEj/114ubtbDuQZUh MBu3GCKAB1RWkLcYMvbyPMi04xzQc3+m2xXQnn6DxCYiqeqiJ9t4rs/hru/FP1QW 271pgdCHud1Sx0oU/y+mCyseg77hYW3hK18sG5M3Rcggv3LoLmF57jiDEigUwx2y r/J5eH5N6myIB9d4b4NwEdYgcsc1Uq6+3skx2SZChFWMyHU/9y9v7nyloQjq2N68 mW2+xtB9OFe/qgGH/vWU0FVuDSIaQY1uKK7Xy5kN+CaEckms4rUWH2v789CCHB7Y mHvj4jfzZ9BgBhjBHE8WN/a/mE6rL87m0yQaobjwGi8drwpajgeIdBvTn+87AWvd ndT4BFW9los= =5ddL -----END PGP SIGNATURE----- Merge tag 'omap-for-v5.5/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/drivers Changes for ti-sysc interconnect target module driver for v5.5 A series of changes from Tero Kristo for rpm reset control driver to deal with the ordering requirements between clocks and resets, and two changes to deal with quirks for musb otg device. * tag 'omap-for-v5.5/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: bus: ti-sysc: Use swsup quirks also for am335x musb bus: ti-sysc: Handle mstandby quirk and use it for musb bus: ti-sysc: Fix watchdog quirk handling bus: ti-sysc: avoid toggling power state of module during probe bus: ti-sysc: drop the extra hardreset during init bus: ti-sysc: re-order reset and main clock controls Link: https://lore.kernel.org/r/pull-1571853258-16998@atomide.com-2 Signed-off-by: Olof Johansson <olof@lixom.net>
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