x86, cacheinfo: Fixup L3 cache information for AMD multi-node processors

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L3 cache size, associativity and shared_cpu information need to be
adapted to show information for an internal node instead of the
entire physical package.

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>

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Andreas Herrmann 2009-09-03 09:41:19 +02:00 • committed by H. Peter Anvin

parent 4a376ec3a2

commit a326e948c5

1 changed files with 22 additions and 10 deletions

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arch/x86/kernel/cpu/intel_cacheinfo.c

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