KVM: x86/pmu: Update comments for AMD gp counters

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The obsolete comment could more accurately state that AMD platforms
have two base MSR addresses and two different maximum numbers
for gp counters, depending on the X86_FEATURE_PERFCTR_CORE feature.

Signed-off-by: Like Xu <likexu@tencent.com>
Message-Id: <20220518132512.37864-2-likexu@tencent.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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Like Xu 2022-05-18 21:25:02 +08:00 • committed by Paolo Bonzini

parent d1c88a4020

commit a33095f493

1 changed files with 5 additions and 2 deletions

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arch/x86/kvm/pmu.c

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