RISC-V: Use WRITE_ONCE instead of direct access

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The secondary harts spin on couple of per cpu variables until both of
these are non-zero so it's not necessary to have any ordering here.
However, WRITE_ONCE should be used to avoid tearing.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>

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Atish Patra 2018-10-02 12:15:03 -07:00 • committed by Palmer Dabbelt

parent 46373cb442

commit a37d56fc40

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arch/riscv/kernel/smpboot.c

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