PCI/AER: Use explicit register size for PCI_ERR_CAP

Use u32 for PCIe AER Capability register variable and name it "aercc"
(Advanced Error Capabilities and Control register, PCIe r6.1 sec 7.8.4.7)
instead of "temp".

Link: https://lore.kernel.org/r/20240206135717.8565-2-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
[bhelgaas: make subject more specific and match similar previous patches]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Ilpo Järvinen 2024-02-06 15:57:14 +02:00 • committed by Bjorn Helgaas
commit a37e12bcab