dt: psci: Update DT bindings to support hierarchical PSCI states

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Update PSCI DT bindings to allow to represent idle states for CPUs and the
CPU topology, by using a hierarchical layout. Primarily this is done by
re-using the existing DT bindings for PM domains [1] and for PM domain idle
states [2].

Let's also add an example into the document for the PSCI DT bindings, to
clearly show the new hierarchical based layout. The currently supported
flattened layout, is already described in the ARM idle states bindings [3],
so let's leave that as is.

[1] Documentation/devicetree/bindings/power/power_domain.txt
[2] Documentation/devicetree/bindings/power/domain-idle-state.txt
[3] Documentation/devicetree/bindings/arm/idle-states.txt

Co-developed-by: Lina Iyer <lina.iyer@linaro.org>
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

...

This commit is contained in:

Ulf Hansson 2019-10-10 12:01:48 +02:00

parent 4386aa866d

commit a3f048b542

2 changed files with 119 additions and 0 deletions

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15

Documentation/devicetree/bindings/arm/cpus.yaml

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104

Documentation/devicetree/bindings/arm/psci.yaml

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