x86/KVM/VMX: Add L1D flush algorithm

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To mitigate the L1 Terminal Fault vulnerability it's required to flush L1D
on VMENTER to prevent rogue guests from snooping host memory.

CPUs will have a new control MSR via a microcode update to flush L1D with a
single MSR write, but in the absence of microcode a fallback to a software
based flush algorithm is required.

Add a software flush loop which is based on code from Intel.

[ tglx: Split out from combo patch ]
[ bpetkov: Polish the asm code ]

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

...

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Paolo Bonzini 2018-07-02 12:47:38 +02:00 • committed by Thomas Gleixner

parent a399477e52

commit a47dd5f067

1 changed files with 66 additions and 5 deletions

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arch/x86/kvm/vmx.c

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