drm/i915/color: Add YUV buffer support on HDR planes

Browse source

Add the INTEL_PLANE_CB_CSC_FF (fixed function CSC) color block as the
first stage for the HDR planes. This enables YUV-to-RGB color space
conversion on HDR planes via the color pipeline.

Also in icl_program_input_csc(), account for the color pipeline
programming, in addition to FB format.

v2:
 - Increase MAX_COLOROP to 5 (Sashiko)

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patch.msgid.link/20260902075417.656673-10-chaitanya.kumar.borah@intel.com

...

This commit is contained in:

Chaitanya Kumar Borah 2026-09-02 13:24:17 +05:30

parent 334a8c2290

commit a4e6c6a761

2 changed files with 5 additions and 2 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

4

drivers/gpu/drm/i915/display/intel_color_pipeline.c

View file

3

drivers/gpu/drm/i915/display/skl_universal_plane.c

View file