clk: renesas: r8a779g0: Add watchdog clock

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Add the module clock used by the RCLK Watchdog Timer on the Renesas
R-Car V4H (R8A779G0) SoC.

Extracted from a larger patch in the BSP by Kazuya Mizuguchi.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/a012e4449b976efbeaabebb983fa6cfc1b9329d3.1662714852.git.geert+renesas@glider.be

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Geert Uytterhoeven 2022-09-09 11:25:12 +02:00

parent e312ae9207

commit a4f8a6e60c

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drivers/clk/renesas/r8a779g0-cpg-mssr.c

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