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media: staging: rkisp1: cap: fix value written to uv swap register in selfpath
The value RKISP1_CIF_MI_XTD_FMT_CTRL_SP_CB_CR_SWAP should be set to the register instead of masking with ~BIT(1) Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com> Acked-by: Helen Koike <helen.koike@collabora.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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