net/mlx5e: Expose FEC feilds and related capability bit

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Introduce 50G per lane FEC modes capability bit and newly supported
fields in PPLM register which allow this configuration.

Signed-off-by: Aya Levin <ayal@mellanox.com>
Reviewed-by: Eran Ben Elisha <eranbe@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>

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Aya Levin 2019-12-30 14:22:57 +02:00 • committed by Saeed Mahameed

parent 822e114b50

commit a58837f52d

1 changed files with 15 additions and 1 deletions

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include/linux/mlx5/mlx5_ifc.h

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