sh_eth: add sh_eth_cpu_data::gecmr flag

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Not all Ether controllers having the Gigabit register layout have GECMR --
RZ/A1 (AKA R7S72100) actually has the same layout but no Gigabit speed
support and hence no GECMR. In the past, the new register map table was
added for this SoC, now I think we should have used the existing Gigabit
table with the differences (such as GECMR) covered by the mere flags in
the 'struct sh_eth_cpu_data'. Add such flag for GECMR -- and then we can
get rid of the R7S72100 specific layout in the next patch...

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Tested-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

...

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Sergei Shtylyov 2020-02-15 23:13:45 +03:00 • committed by David S. Miller

parent 7bf47f609f

commit a6318d57f6

2 changed files with 14 additions and 1 deletions

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14

drivers/net/ethernet/renesas/sh_eth.c

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1

drivers/net/ethernet/renesas/sh_eth.h

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