PCI: dwc: designware: Add new *ops* for CPU addr fixup

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Some platforms (like dra7xx) require only the least 28 bits of the
corresponding 32 bit CPU address to be programmed in the address
translation unit. This modified address is stored in io_base/mem_base/
cfg0_base/cfg1_base in dra7xx_pcie_host_init(). While this is okay for
host mode where the address range is fixed, device mode requires different
addresses to be programmed based on the host buffer address.  Add a new
ops to get the least 28 bits of the corresponding 32 bit CPU address and
invoke it before programming the address translation unit.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Joao Pinto <jpinto@synopsys.com>

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Kishon Vijay Abraham I 2017-03-13 19:13:22 +05:30 • committed by Bjorn Helgaas

parent 1b497e6493

commit a660083eb0

2 changed files with 4 additions and 0 deletions

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drivers/pci/dwc/pcie-designware.c

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1

drivers/pci/dwc/pcie-designware.h

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