ARM: 6389/1: errata: incorrect hazard handling in the SCU may lead to data corruption

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On the r2p0, r2p1 and r2p2 versions of the Cortex-A9, data corruption
can occur if a shared cache line is replaced on one CPU as another CPU
is accessing it.

This workaround sets two bits in the diagnostic register of the Cortex-A9,
reducing the linefill issuing capabilities of the processor and
avoiding the erroneous behaviour.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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Will Deacon 2010-09-14 09:53:02 +01:00 • committed by Russell King

parent 9f05027c7c

commit a672e99b12

2 changed files with 23 additions and 0 deletions

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arch/arm/Kconfig

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9

arch/arm/mm/proc-v7.S

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