drm: rcar-du: Turn LVDS clock output on/off for DPAD0 output on D3/E3

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On the D3 and E3 SoCs the LVDS PLL clock output provides the dot clock
to the DU channels, even when the LVDS outputs are not in use. Enable
and disable the LVDS clock output when enabling or disabling a CRTC
connected to the DPAD0 output.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

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Laurent Pinchart 2019-01-17 01:59:34 +02:00

parent 02f2b30032

commit a6cc417d3e

3 changed files with 38 additions and 0 deletions

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34

drivers/gpu/drm/rcar-du/rcar_du_crtc.c

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3

drivers/gpu/drm/rcar-du/rcar_du_drv.h

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1

drivers/gpu/drm/rcar-du/rcar_du_encoder.c

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