[MIPS] Sibyte: resurrect old cache hack.

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The recent switch of the Sibyte SOCs from the processor specific cache
managment code in c-sb1.c to c-r4k.c lost this old hack

    [MIPS] Hack for SB1 cache issues

    Removing flush_icache_page a while ago broke SB1 which was using an empty
    flush_data_cache_page function.  This glues things well enough so a more
    efficient but also more intrusive solution can be found later.

    Signed-Off-By: Thiemo Seufer <ths@networkno.de>
    Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

in the hope it was no longer needed.  As it turns it still is so resurrect
it until there is a better solution.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

...

This commit is contained in:

Ralf Baechle 2007-11-03 01:01:37 +00:00

parent 99fee6d7e5

commit a754f70886

1 changed files with 6 additions and 1 deletions

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arch/mips/mm/c-r4k.c

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