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firmware: ti_sci: add CPU latency constraint management
During system-wide suspend, check if any of the CPUs have PM QoS resume latency constraints set. If so, set TI SCI constraint. TI SCI has a single system-wide latency constraint, so use the max of any of the CPU latencies as the system-wide value. Note: DM firmware clears all constraints at resume time, so constraints need to be checked/updated/sent at each system suspend. Co-developed-by: Vibhore Vardhan <vibhore@ti.com> Signed-off-by: Vibhore Vardhan <vibhore@ti.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Signed-off-by: Dhruva Gole <d-gole@ti.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Dhruva Gole <d-gole@ti.com> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20241007-tisci-syssuspendresume-v13-5-ed54cd659a49@baylibre.com Signed-off-by: Nishanth Menon <nm@ti.com>
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