arm64: dts: amlogic: meson-g12b: Fix L2 cache reference for S922X CPUs

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The original addition of cache information for the Amlogic S922X SoC
used the wrong next-level cache node for CPU cores 100 and 101,
incorrectly referencing `l2_cache_l`. These cores actually belong to
the big cluster and should reference `l2_cache_b`. Update the device
tree accordingly.

Fixes: e7f85e6c15 ("arm64: dts: amlogic: Add cache information to the Amlogic S922X SoC")
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20251123-fixkhadas-v1-1-045348f0a4c2@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

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Guillaume La Roque 2025-11-23 18:14:10 +01:00 • committed by Neil Armstrong

parent e1c246c641

commit a7ab6f9466

1 changed files with 2 additions and 2 deletions

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arch/arm64/boot/dts/amlogic/meson-g12b.dtsi

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