dt-bindings: phy: Clarify ULPI PHY source clock

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cdev2 is not actually a clock on Tegra20 but rather a pinmux pad group.
PLL_P_OUT4 is the source clock for the ULPI PHY and is output to the
DAP_MCLK2 pad.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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Marcel Ziswiler 2018-02-22 15:38:25 +01:00 • committed by Thierry Reding

parent ff0286cbcc

commit a7ca2a709d

1 changed files with 3 additions and 1 deletions

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Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.txt

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