ASoC: mediatek: mt8192: fix register configuration for tdm

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For DSP_A, data is a BCK cycle behind LRCK trigger edge. For DSP_B, this
delay doesn't exist. Fix the delay configuration to match the standard.

Fixes: 52fcd65414 ("ASoC: mediatek: mt8192: support tdm in platform driver")
Signed-off-by: Hsin-Te Yuan <yuanhsinte@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20240509-8192-tdm-v1-1-530b54645763@chromium.org
Signed-off-by: Mark Brown <broonie@kernel.org>

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Hsin-Te Yuan 2024-05-09 07:31:29 +00:00 • committed by Mark Brown

parent 6490bec6d5

commit a85ed162f0

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sound/soc/mediatek/mt8192/mt8192-dai-tdm.c

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