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Microchip RISC-V devicetrees for 5.20
A pair of changes for mpfs.dtsi:
- A pair of patches from Suresh & I, removing the bogus max frequency
properties from the controller nodes for {q,}spi. This is a device
only property with no meaning for a controller and should never have
been there.
- RISC-V has no sensible defaults for cpu topology, so I added a this
information to the dt for MPFS as a cpu-map. This is an optional
property and therefore is not a fix.
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Merge tag 'dt-for-palmer-v5.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git into for-next
Microchip RISC-V devicetrees for 5.20
A pair of changes for mpfs.dtsi:
- A pair of patches from Suresh & I, removing the bogus max frequency
properties from the controller nodes for {q,}spi. This is a device
only property with no meaning for a controller and should never have
been there.
- RISC-V has no sensible defaults for cpu topology, so I added a this
information to the dt for MPFS as a cpu-map. This is an optional
property and therefore is not a fix.
* tag 'dt-for-palmer-v5.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git:
riscv: dts: microchip: Add mpfs' topology information
riscv: dts: microchip: remove spi-max-frequency property
riscv: dts: microchip: remove spi-max-frequency property
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