Addition of the Exynos3250 SoC's UART2 and MMC2 clocks.

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-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCAAGBQJW/QAkAAoJEE1bIKeAnHqLBS4P/2QojfMFP3Okyk2Rd5AgwjLo
 1qpSD/ZfK0U9GShacmO1UELq1T+R8PsEWm87VxAgy4o+7XhHpbX17IzIQ/GkvM/E
 OKRS0/1RH3EPD7wofxgREveoGUps/wAf9SaA1eb+hE1yTJPQVVClVvmwiXzem/0i
 5cczy6j9SZH16us9OUvVvW2CF7z2yeJSVSjTkrupKwGI6xEHOs8nSHvwT3ASzNgN
 G2XUcyw5yf9oErLqhK8zRLXE86qlhZy/kkeIFfh46N9COaRvPhz+Q0aQMZ7Az42a
 5qvD1cG/4ETrM7pjKn+lmTfU6PMdmIHxebvjPhUdmO49FE6tU0oca1EqKuFIwXLG
 rnrQKzHTpkfcoJzw2vhcB7L9JTqQP8Wy3y3mOgEkhSb1k/HRj0s8STduEeJY8J+Q
 1dCwybEk8wISjv/BreopdyeCsKqyaK60EEdafnixPxWSroyAkT7I3M6pDIiWw1XR
 6OMH3Et2wxRZaQwYRtBtYtWII9oqge+DzGUmSgN+ojWWFVk02e9LIb8S1PIzmDsG
 Ra3NM0hJhCYE+SBCNH7hLF/OARqCepNbUVS6N6O7fwK2IeVuJ3Vkgi1A/IY1jD43
 TPLJHR8ayGHSjEfnbhO9J9mqxlpqvbndyZSVcTuKGjpsBgFhC2a33/URYlUH8MiW
 B4yk6GkTHgI4ilFC+imA
 =xr9Q
 -----END PGP SIGNATURE-----

Merge tag 'clk-v4.7-exynos3250' of git://linuxtv.org/snawrocki/samsung into for-v4.7/dt-exynos3250-artik5

Addition of the Exynos3250 SoC's UART2 and MMC2 clocks.

Pull clocks used on Exynos3250-based Artik-5 board.

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This commit is contained in:

Krzysztof Kozlowski 2016-04-01 02:09:43 +02:00

parent f55532a0c0 f6764714af

commit a8b41ea4ba

2 changed files with 25 additions and 1 deletions

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15

drivers/clk/samsung/clk-exynos3250.c

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11

include/dt-bindings/clock/exynos3250.h

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