clk: sunxi-ng: Support fixed post-dividers on NKMP style clocks

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On the new Allwinner H6 SoC, multiple PLL's are NMP style clocks
(modelled as NKMP with no K) and have fixed post-dividers.

Add fixed post divider support to the NKMP style clocks.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

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Icenowy Zheng 2018-03-16 22:02:11 +08:00 • committed by Maxime Ripard

parent 55de0f31df

commit a910f251ee

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2 changed files with 19 additions and 3 deletions

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20

drivers/clk/sunxi-ng/ccu_nkmp.c

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2

drivers/clk/sunxi-ng/ccu_nkmp.h

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