drm/i915/icl: Enable pipe output csc

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GEN11+ onwards an output csc hardware block has been added.
This is after the pipe gamma block and is in addition to the
legacy pipe CSC block. Primary use case for this block is to
convert RGB to YUV in case sink supports YUV.
This patch adds supports for the same.

v2: This is added after splitting the existing ICL pipe CSC
handling. As per Matt's suggestion, made this to co-exist
with existing pipe CSC, wherein both can be enabled if a
certain usecase arises.

v3: Fixed an issue with co-existence of output csc and normal
pipe csc, spotted by Matt. Put the csc mode flag enabling to
color_check to align with atomic.

v4: Fixed macro alignment and checkpatch complaints wrt line over
100 characters limit.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1549893025-21837-5-git-send-email-uma.shankar@intel.com

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This commit is contained in:

Uma Shankar 2019-02-11 19:20:24 +05:30 • committed by Maarten Lankhorst

parent 255fcfbc3c

commit a91de58054

3 changed files with 126 additions and 19 deletions

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65

drivers/gpu/drm/i915/i915_reg.h

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77

drivers/gpu/drm/i915/intel_color.c

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3

drivers/gpu/drm/i915/intel_drv.h

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